Alarm circuit

ABSTRACT

An alarm circuit includes a fan controller with a rotation speed control pin and a rotation speed detection pin, a first rectifying circuit connected to the rotation speed control pin, a switch circuit connected to the first rectifying circuit, a first indication circuit for indicating whether the fan fails to operate based on a switch signal from the switch circuit. The alarm circuit further includes a second rectifying circuit connected to the rotation speed detection pin, a comparison circuit for outputting a comparison signal after comparing a direct current signal from the second rectifying circuit with a first reference voltage and a second reference voltage, and an indication circuit for indicating whether the fan fails to operate based on the comparison signal.

BACKGROUND

1. Technical Field

The present disclosure relates to alarm circuits and, particularly to an alarm circuit for fans.

2. Description of Related Art

Fans are usually mounted in a computer to cool components, such as a central processing unit, arranged in the computer. When a fan fails to operate, the internal temperature of the computer may get too high. As a result, the components may operate abnormally or fail to operate.

BRIEF DESCRIPTION OF THE DRAWING

Many aspects of the embodiments can be better understood with reference to the following drawing. The components in the drawing are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the present embodiments.

The FIGURE is a circuit diagram of an exemplary embodiment of an alarm circuit for fans.

DETAILED DESCRIPTION

The disclosure, including the accompanying drawing, is illustrated by way of example and not by way of limitation. It should be noted that references to “an” or “one” embodiment in this disclosure are not necessarily to the same embodiment, and such references mean at least one.

Referring to the FIGURE, an exemplary embodiment of an alarm circuit 100 for a fan 90 includes a fan controller 10 connected to the fan 90, a first rectifying circuit 20 connected to the fan controller 10, a switch circuit 60 connected to the first rectifying circuit 20, a first indication circuit 70 connected to the switch circuit 60, a second rectifying circuit 30 connected to the fan controller 10, a comparison circuit 40 connected to the second rectifying circuit 30, and a second indication circuit 50 connected to the comparison circuit 40.

The fan controller 10 controls the fan 90 to operate. The fan controller 10 includes a rotation speed control pin 16 for outputting a control signal to the first rectifying circuit 20, and a rotation speed detection pin 14 for outputting a detection signal to the second rectifying circuit 30. When the fan 90 fails to operate, the control signal is a low-level signal, such as logical 0, and the detection signal is a high-level signal V1, such as logical 1, or a low-level signal V2, based on the signal at the detection pin 14 at the moment the fan 90 fails to operate. When the fan 90 operates normally at full speed, the control signal is a high-level signal. When the fan 90 operates normally at low speed, the control signal is a pulse signal. When the fan 90 operates normally, the detection signal is a pulse signal. When the fan 90 fails to operate at the moment the detection pin 14 outputs a high-level pulse signal, or a low level pulse signal, the detection signal is a high-level signal or a low level signal corresponding to the pulse point at the moment of the fan failure.

The first rectifying circuit 20 converts the control signal to a first direct current (DC) signal. The switch circuit 60 outputs a corresponding switch signal based on the first DC signal. The first indication circuit 70 indicates whether the fan 90 fails to operate based on the switch signal. The second rectifying circuit 30 converts a pulse detection signal to a second DC signal V3 which is greater than the signal V2 but less than the signal V1. The comparison circuit 40 compares the signal V3 with a first reference voltage Vref1 and a second reference voltage Vref2, and outputs a comparison signal. The second indication circuit 50 indicates whether the fan 90 fails to operate based on the comparison signal.

The first rectifying circuit 20 includes a resistor R1, a diode D1, and a capacitor C1. A first terminal of the resistor R1 is connected to the rotation speed control pin 16, and a second terminal of the resistor R1 is connected to an anode of the diode D1. A cathode of the diode D1 is grounded through the capacitor C1.

The switch circuit 60 includes transistors Q1 and Q2, and resistors R2 and R3. A base of the transistor Q1 is connected to the cathode of the diode D1. A collector of the transistor Q1 is connected to a DC power supply VCC through the resistor R2. An emitter of the transistor Q1 is grounded. Abase of the transistor Q2 is connected to the collector of the transistor Q1. A collector of the transistor Q2 is connected to the power supply VCC through the resistor R3. An emitter of the transistor Q2 is grounded. In this embodiment, the transistors Q1 and Q2 are negative-positive-negative (npn) bipolar junction transistors.

The first indication circuit 70 includes a resistor R4, a diode D2, a capacitor C2, and a buzzer F1. A cathode of the diode D2 is connected to the power supply VCC. An anode of the diode D2 is grounded through the capacitor C2, and is further connected to the collector of the transistor Q2. A first terminal of the buzzer F1 is connected to the power supply VCC. A second terminal of the buzzer F1 is connected to the anode of the diode D2 through the resistor R4. In other embodiments, the buzzer F1 can be replaced by other indication components, such as a beeper and a light-emitting diode (LED).

The second rectifying circuit 30 includes a resistor R5 and a capacitor C3. The detection pin 14 is grounded through the resistor R5 and the capacitor C3 connected in series.

The comparison circuit 40 includes comparators U1 and U2, and resistors R6-R9. A non-inverting input of the comparator U1 is connected to the power supply VCC through the resistor R6, and is further grounded through the resistor R7. An inverting input of the comparator U1 and a non-inverting input of the comparator U2 are both connected to a node between the resistor R5 and the capacitor C3. An inverting input of the comparator U2 is connected to the power supply VCC through the resistor R8, and is also grounded through the resistor R9.

The second indication circuit 50 includes a resistor R10, a diode D3, a capacitor C4, and a buzzer F2. A cathode of the diode D3 is connected to the power supply VCC. An anode of the diode D3 is grounded through the capacitor C4, and is also connected to outputs of the comparators U1 and U2. A first terminal of the buzzer F2 is connected to the power supply VCC, and a second terminal of the buzzer F2 is connected to the anode of the diode D3 through the resistor R10. In other embodiments, the buzzer F2 can be replaced by other indication components, such as a beeper and a light-emitting diode (LED).

In use, when the fan 90 operates normally at low speed, the control pin 16 outputs a pulse signal. The first rectifying circuit 20 converts the pulse signal into a DC signal and outputs the DC voltage signal to the base of the transistor Q1, to turn on transistor Q1. When transistor Q1 is on, transistor Q2 is off because the base of transistor Q2 is grounded through transistor Q1. The second terminal of buzzer F1 is pulled up to receive a high-level voltage from the power supply VCC. Therefore, the buzzer F1 does not buzz.

When the fan 90 operates normally at a full speed, the control pin 16 outputs a high-level signal to the base of transistor Q1 through the rectifying circuit 20. As is described above, the buzzer F1 does not buzz.

When the fan 90 fails to operate, the control pin 16 outputs a low-level signal to the base of the transistor Q1 through the first rectifying circuit 20, to turn off transistor Q1. Transistor Q2 is on because the base of transistor Q2 is pulled up to receive a high-level voltage from the power supply VCC. The second terminal of buzzer F1 is grounded, which makes the buzzer F1 buzz to inform users of fan 90 failure.

When the fan 90 operates normally, the detection pin 14 outputs a pulse signal. The second rectifying circuit 30 converts the pulse signal to the DC signal V3, and outputs the DC signal V3 to the inverting input of the comparator U1 and the non-inverting input of the comparator U2. The voltage at the non-inverting input of the comparator U1, which is the voltage Vref1, varies according to resistance of the resistors R6 and R7. In this embodiment, the voltage Vref1 is set to be equal to the voltage V1. As the voltage V3 is less than the voltage V1, the voltage V3 is less than the voltage Vref1. The voltage at the inverting input of the comparator U1 is less than the non-inverting input of the comparator U1. Therefore, the output of the comparator U1 outputs a high-level signal.

The voltage at the inverting input of the comparator U2, which is the second reference voltage Vref2, varies according to resistance of the resistors R8 and R9. In this embodiment, the voltage Vref2 is set be equal to the voltage V2. As the voltage V3 is greater than the voltage V2, the voltage at the non-inverting input of the comparator U2 is greater than the inverting input of the comparator U2. Therefore, the output of the comparator U2 outputs a high-level signal. The signal at the second terminal of the buzzer F2 is a high-level signal. Thereby the buzzer F2 does not buzz.

If the fan 90 fails to operate at the moment the detection pin 14 outputs the high-level signal V1, the detection pin 14 keeps outputting the high-level signal V1. The high-level signal V1 is outputted to the inverting input of the comparator U1 and the non-inverting input of the comparator U2 through the second rectifying circuit 30. The voltage V1 is greater than the voltage Vref1 and the voltage Vref2. The voltage at the inverting input of the comparator U1 is greater than the voltage at the non-inverting input of the comparator U1, and the voltage at the non-inverting input of the comparator U2 is greater than the voltage at the inverting input of the comparator U2. Therefore, the comparator U1 outputs a low-level signal, and the comparator U2 outputs a high-level signal. The voltage at the second terminal of the buzzer F2 is a low-level signal, which makes the buzzer F2 buzz to inform the users of fan 90 failure.

If the fan 90 fails to operate at the moment the detection pin 14 outputs the low-level signal V2, the detection pin 14 keeps outputting the low-level signal V2. The signal V2 is output to the inverting input of the comparator U1 and the non-inverting input of the comparator U2 through the second rectifying circuit 30. As the voltage V2 is less than the voltage Vref1 and Vref2, the voltage at the non-inverting input of the comparator U1 is greater than the inverting input of the comparator U1, and the voltage at the inverting input of the comparator U2 is greater than the non-inverting input of the comparator U2. The voltage at the second terminal of the buzzer F2 is a low-level signal, which makes the buzzer F2 buzz to inform the users of fan 90 failures.

In other embodiments, the transistors Q1 and Q2 can be replaced by other electronic switches, such as metal-oxide-semiconductor field-effect transistors.

The foregoing description of the exemplary embodiments of the disclosure has been presented only for the purposes of illustration and description and is not intended to be exhaustive or to limit the disclosure to the precise forms disclosed. Many modifications and variations are possible. The embodiments were chosen and described in order to explain the principles of the disclosure and their practical application so as to enable others of ordinary skill in the art to utilize the disclosure and various embodiments and with such various modifications as are suited to the particular use contemplated. Alternative embodiments will become apparent to those of ordinary skills in the art to which the present disclosure pertains without departing from its spirit and scope. Accordingly, the scope of the present disclosure is defined by the appended claims rather than by the foregoing description and the exemplary embodiments described therein. 

1. An alarm circuit for a fan, the alarm circuit comprising: a fan controller connected to the fan to control the fan to operate, the fan controller comprising a rotation speed control pin for outputting a control signal, and a rotation speed detection pin for outputting a detection signal; a first rectifying circuit for converting the control signal to a first direct current (DC) signal; a switch circuit for outputting a switch signal based on the first DC signal; a first indication circuit for indicating whether the fan fails to operate based on the switch signal; a second rectifying circuit for converting the detection signal to a second DC signal; a comparison circuit for outputting a comparison signal after comparing the second DC signal with a first reference voltage and a second reference voltage; and an indication circuit for indicating whether the fan fails to operate based on the comparison signal.
 2. The alarm circuit of claim 1, wherein the first rectifying circuit comprises a first resistor, a first diode, and a first capacitor, a first terminal of the first resistor is connected to the rotation speed control pin, a second terminal of the first resistor is connected to an anode of the first diode, a cathode of the first diode is grounded through the first capacitor.
 3. The alarm circuit of claim 2, wherein the switch circuit comprises a first and a second electronic switches, and a second and a third resistors, a first terminal of the first electronic switch is connected to the cathode of the first diode, a second terminal of the first electronic switch is connected to a DC power supply through the second resistor, a third terminal of the first electronic switch is grounded, a first terminal of the second electronic switch is connected to the second terminal of the first electronic switch, a second terminal of the second electronic switch is connected to the DC power supply through the third resistor, a third terminal of the second electronic switch is grounded; wherein the first and second electronic switches are turned on in response to the voltages at the first terminals being high-level, and wherein the first and second electronic switches are turned off in response to the voltages at the first terminals being low-level.
 4. The alarm circuit of claim 3, wherein the first electronic switch is a negative-positive-negative (npn) bipolar junction transistor, the first to the third terminals of the first electronic switch are a base, a collector, and an emitter of the transistor, respectively.
 5. The alarm circuit of claim 3, wherein the second electronic switch is a negative-positive-negative (npn) bipolar junction transistor, the first to the third terminals of the second electronic switch are a base, a collector, and an emitter of the transistor, respectively.
 6. The alarm circuit of claim 3, wherein the first indication circuit comprises a fourth resistor, a second diode, a second capacitor, and a first buzzer, a cathode of the second diode is connected to the DC power supply, an anode of the second diode is grounded through the second capacitor, and is further connected to the second terminal of the second electronic switch, a first terminal of the first buzzer is connected to the DC power supply, a second terminal of the first buzzer is connected to the anode of the second diode through the fourth resistor.
 7. The alarm circuit of claim 6, wherein the second rectifying circuit comprises a fifth resistor and a third capacitor, the rotation speed detection pin is grounded through the fifth resistor and the third capacitor connected in series.
 8. The alarm circuit of claim 7, wherein the comparison circuit comprises a first and a second comparators, and a sixth to a ninth resistors, a non-inverting input of the first comparator is connected to the DC power supply through the sixth resistor, and is further grounded through the seventh resistor, an inverting input of the first comparator and a non-inverting input of the second comparator are connected to a node between the fifth resistor and the third capacitor.
 9. The alarm circuit of claim 8, wherein the second indication circuit comprises a tenth resistor, a third diode, a fourth capacitor, and a second buzzer, a cathode of the third diode is connected to the DC power supply, an anode of the third diode is grounded through the fourth capacitor, and is connected to outputs of the first and the second comparators, a first terminal of the second buzzer is connected to the DC power supply, a second terminal of the second buzzer is connected to the anode of the third diode through the tenth resistor. 